Amit Saxena is the Vice President of Engineering, Digital IP Business Unit, and leads the strategy and development of High speed interconnects intellectual blocks at Mobiveil. Amit brings more than 23 years of Engineering and Management experience in the Semiconductor, IP and Systems Industry. Prior to this position, he served as the Director of Engineering at L&T Infotech and GDA Technologies where he led development and deployment of high speed Interconnect IP blocks including PCI Express, RapidIO, USB3 and MIPI. Amit successfully built and guided the IP Engineering and Applications organizations under the Product Engineering Services Business Unit in L&T Infotech, Ltd. Amit holds a MS degree in Communication Systems from IIT Kanpur.